The drastically different processes used in modern CMOS technologies compared to qubit technologies often prevent monolithic integration of qubits and classical circuits like multiplexers. Therefore, novel qubit-wafer bonding processes are another key ingredient to bring CMOS technologies closer to the qubit. State-of-the-art bonding tools used in modern CMOS packaging, lack the necessary process capabilities and integrated process control to cater for qubit integration and stacking.

Within ARCTIC, new and essential process capabilities like material cleaning, in-situ oxide removal on chip and on substrate, or high cleanliness control at the bonding area will be developed and demonstrated. Furthermore, in-situ monitoring and control of critical process parameters such as temperature and pressure monitoring with high accuracy during the full handling and integration steps will be conceived and validated. Finally, component tracking and pre and post-bond inspection including infra-red inspection capabilities will be demonstrated for reliable handling and processing of expensive and complex materials.

Furthermore, the partners will develop and validate novel low-temperature thermo-compression and flip-chip bonding processes and other packaging solutions to integrate qubits with classical CMOS circuits. The materials used in quantum computing often are superconducting layers and indium layer as solder material due to its stability at cryogenic temperatures. However, superconductivity will also degrade thermal conductivity, potentially degrading thermalization and increasing self-heating effects. We will therefore develop novel low-temperature and plasma-assisted bonding schemes for 3D integration of junction coolers and demonstrate flip-chip and chiplet based cryo-compatible packaging solutions considering thermal-matching, heat-conductivity, fatigue, and connections to thermalization points.